Low-power buffered clock tree design

A. Vittal; M. Marek-Sadowska

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1997) - Comments
doi: 10.1109/43.658565 issn: 0278-0070 issn: 1937-4151

A. Vittal, M. Marek-Sadowska

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Institute of Electrical and Electronics Engineers (IEEE)