A Spur Suppression Technique Using an Edge-Interpolator for a Charge-Pump PLL

IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2012) - Comments
doi: 10.1109/tvlsi.2011.2129602 issn: 1063-8210 issn: 1557-9999

Jaehyouk Choi, Woonyun Kim, Kyutae Lim