Data-path unrolling with logic folding for area-time-efficient FPGA-based FAST corner detector

Journal of Real-Time Image Processing (2019) - Comments
doi: 10.1007/s11554-017-0725-0 issn: 1861-8200 issn: 1861-8219

Siew-Kei Lam, Teck Chuan Lim, Meiqing Wu, Bin Cao, Bhavan A. Jasani