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Performance Characterization and Design Guidelines for Efficient Processor–FPGA Communication in Cyclone V FPSoCs
IEEE Transactions on Industrial Electronics (2018) -
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doi: 10.1109/tie.2017.2766581 issn: 0278-0046 issn: 1557-9948
Roberto Fernandez Molanes, Juan J. Rodriguez-Andina, Jose Farina
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Institute of Electrical and Electronics Engineers (IEEE)
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