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Jinn-Shyan WANG, Yu-Juey CHANG, Chingwei YEH
Search publications for: doi:10.1587/TRANSELE.E93.C.1540 1 result
Heuristic Sizing Methodology for Designing High-Performance CMOS Level Converters with Balanced Rise and Fall Delays
Jinn-Shyan WANG, Yu-Juey CHANG, Chingwei YEH